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November 9, 2020 at 3:20 PM. AXI Performance Monitoring on RPU DDR port from R5 processor with Ultrascale MPSoc. Dear all, I'm trying to read the DDR performance on Zynq Ultrascale\+ MPSoc XCZU4 using a standalone application with the XAxiPmon API on the R5 processor 0. The DDR is initialized using the FSBL. daftar slot garuda